I have several layouts by a few different people and it seems like everyone picks a different point to make the 0,0 coordinate on a board.

I always assumed the lower left corner would be it but apparently some people like to make the lower left standoff hole 0,0.

Is there an industry standard?

If it is not the lower left corner, why not?

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Active Clearance not available in Display Control menu.

http://supportnet.mentor.com/?do=reference.technote&id=MG591155&prod=C107-S114-G192-P10287&lang=en&snw_source=pro&referringNode=portal

Package fails after replacing with similar part using xDX Databook Annotate Properties to Selected Components.

http://supportnet.mentor.com/?do=reference.technote&id=MG591242&prod=C107-S114-G192-P10287&lang=en&snw_source=pro&referringNode=portal

On bottom layer of my board I have 2 components (large ~0.5" pads for battery contacts).

I also have text "LAYER 2" with width of 0.020"

When I got to generate gerbers the battery pads show up as hatched area, why....? They should be completely solid, they are nothing but a rectangular pads, not fills / floods...

If I change the "LAYER 2" text width to 0.001 or get rid of the text all together, the pads show up correctly.

Can somebody explain what is going on? I've looked through all of the CAM settings and can't find anything that will make sense. It's like PADS picks 0.020" thick pen for everything on that layer if "LAYER 2" text is at 0.020

Thank you,

Boris.

I'm trying to follow the 7.9.4 tutorial, but I don't understand the string of acceptable values in the drc-002 rules settings

It had me change the "Values" string

from

^(~?[a-zA-Z_0-9+-.]+)$

to

^([a-zA-Z_0-9+-.~$]*)$

so that the characters "~" and "$" are acceptable in net names

What is the significance of removing the "?"

What is the significance of changing the "+" to "*"

Did the position of "~" in the string make a difference?

I tried to click "HELP" from the Verify/Tools dialog, but it doesn't explain the syntax

thanks,

Jack (aka "the new guy")

Here's a pic:

Hi,

I inherited a Expedition design.  I would like to grow the board, which I have done and add my portion of the design which together with the parts that were on the board before I took it over would comprise the whole board.  I would like to lock down the components and traces that I inherited.  I have already place all of my components that were not on the original design.  Now I would like to start routing my portion of the board.  I would only like to route on the top and the bottom layers.  I have placed planes in the inner layers under my portion of the board, and I don't want traces to be routed on those inner layers.  The inherited portion of the board has traces routed on those inner layers.  I would like to route by hand the critical traces on my portion of the board and then use the autorouter to route the rest of the traces on my portion of the board.  Mind you that the inner layers are not defined as planes, I drew planar areas on the inner layers for my "ground plane" for instance.  I attached a bitmap file showing the board.

My question is:

How do I specify that the autorouter only route on the top and bottom layer given the information described above.

Ken

Hi there,

I am new to DxDesigner. I am using symbol editor to create an 80 pin connector. I used "Add a pin Array" command and was able to place the pins on the symbol. But the pin numbers field in the Properties Window is empty. It takes too long to enter the pin numbers manually one by one.

I am sure there will be a way to assign pin numbers using a faster method. I cannot copy/paste the pin numbers using an excel spreadsheet. Please have a look at the attached screenshot and help me out.

Regards,

I'm running into a problem with I/O designer, where it will not update the FPGA libraries via the Internet. I've had this issue since the last time I used IOD back in February, and I ended up with errors on some pin labels, because I chose to ignore the fact the IOD was not updating from the internet, so I don't want to make that mistake again. Here is the error log of the updater:

Current version of I/O Designer IOD9.5

Current version of library 095_000_001_010

Using server http://supportnet.mentor.com/productupdates/

Downloading manifest file http://supportnet.mentor.com/productupdates/public/iod/libraries/IOD9.5/update.xml

Manifest file : http://supportnet.mentor.com/productupdates/public/iod/libraries/IOD9.5/update.xml was downloaded successfully to path C:\Users\TDesmit\iod_updates\update.xml

Loading manifest file C:\Users\TDesmit\iod_updates\update.xml

This is an older version of IOD, but I don't have a choice on that; since IOD is now bundled with Expedition Enterprise, and we cannot move to vX because it breaks all our automation, I'm stuck with this version. If I can't get this version to update, I guess I will not be able to use it, because after getting burned in February, I won't let that happen again.

I'm trying to use IOD in "librarian" mode, to generate some generic symbols for a 896-pin Altera part.

Anyone have any ideas on why this is refusing to update?

Thomas DeSmit

Cobham AvComm (formerly Aeroflex)

I posted a question a short time ago, and I wanted to post it in one of the "ask the expert" forums, but they don't seem to exist any longer! Not even a re-direct, or explanation of what a user should do if they follow a link such as this one:

http://communities.mentor.com/community/pcb/expedition/ask_dxd_expert?view=overview

Clicking on this will now take you to a "page not found"

I realize that things change, but at least have some type of re-direct in place, so people are not sent to a dead-end. This also brings up the question; what happened to all the postings that were listed under this forum?

Thanks,

Thomas DeSmit

Cobham AvComm

This script reports the Netname, Via Padstack Name, X, Y, Span, Hole Size and Owner Refdes/Cell (if applicable) of the via. If the via belongs to a Reuse Block, the refdes will be prefixed with "(RB)". The output is a "via_report.txt" file placed in the design's pcb\LogFiles container and therefore available to Expedition's FileViewer. Upon termination, the file will be opened in WordPad. If WordPad is not available you will need to modify the script to use your preferred text editor.

In my schematic, I have some long nets and I've enabled the checkbox to display the name somewhere along the net. However, to make it easier to read, I really need to display the net name on both ends of the net. Is there a way to do this in DxDesigner? If not, I may have to resort to simply placing text there, which is not ideal.

Thanks for any feedback.

Hi, everyone.

I want to install 2 versions of PADS (9.3 and 9.5) in 1 computer. I have try some way to install: install 2 version different folder, different harddisk. But 2 versions can't work same time. who can install like this, please help me.

Thanks.

Hello,

How to connect the wire bond from the DIE to the Power/Ground rings in Xpedition Advanced Package design?

Also is there any other option to route the wire bond based on nets.Eg: In one instance i want to wire bond route only for VSS then VDD.

Please share your thoughts.

Hello,

How to add LOGIC DESIGN text in Edit Study

Dear all,

I have the following problem: is it possible to check a short connection between two metal (for example, the first metal1 path with A label in metal1text layer and the second metal1 path with B label in meta1text layer), with a script in Calibre DRC?

Thanks

If I print a Layer Stackup the default header shows: "Layer Stackup. Design: PCB, Designer: CAD1."

Where can I change the setting, so the header shows the name of my Design.

Like: "Layer Stackup. Design: c1234.pcb, Designer: CAD1." or "Layer Stackup. Design: c1234, Designer: CAD1."

The InsideOutside.vbs script reports on objects with coordinates inside or outside a specified rectangular area and aids the user in removing unwanted objects not readily seen on the screen. This will generate an "InsideOutside.txt" file to the pcb\LogFiles directory allowing it to be viewed using Expedition's FileViewer and will automatically open it in the system's default text editor upon completion. It will report the Object's Type, Name, (Number of Coordinates) to aid in looking for polygons with insufficient number of coordinates, or, a Text's [Width/Height] to aid in looking for oversized texts, and an X/Y location of the coordinate found to be inside or outside the area (only one pt - x,y - is reported per object). In the case of Text, the Extrema bounds is also checked.

Upon Execution of the script, the user will be prompted for the desired Mode: 1=Report Only, 2=Interactive Delete, 3=Auto Delete.

The user will also be promted to Check: 1=Inside Area, 2=Outside Area

The script will then prompt and wait for two mouse clicks (not drag) to define the rectangular area and will draw and fill the rectangle before executing its search. It will remove this rectangle when the script completes.

Initial intent was to look for objects outside of the intended design area. For instance, things causing Fit View to be oversized, or anomolies in the Gerber Plot.

This script is written for Document Collections as defined in EE7.9u5, hence execution in previous releases that do not contain a certain collection requires modification of the "CheckInOutsideRect" Subroutine. For instance, if your Expedition Version does not have BondPads then you would comment out or remove the line

"If Not checkPt(dObj,pcbDoc.BondPads,"Bond pad",True) Then Exit Sub

Version 2: Added Support for execution in Cell Editor. If there is no existing user layer on which to draw the rectangle, script will create one called "InsideOutside", but the display control will be off so you will not see the rectangle as in normal operation. It will remove this user layer after run.

Version 3: Fixed capability to delete Dimensions.

Version 4: Fixed problem with opening notepad in Win7

Version 5: Fixed Capability to report and delete Glue Spots. These can only be removed from within Cell Editor but will now be reported in Expedition & Cell Editor.

Version 6: Added Capability to report Geometry LineWidths <= 0 by inserting an "*" before NumPts e.g. "(*5)" indicates 5 pts of zero linewidth. Hence, you could search the resulting document for "(*" if you wanted to search for <=0 LineWidth items.

Version 7: Added capability for user to control Precision of coordinates for cleaner printout - At the top of the script, Modify the Const PRECISION to change the number of digits after the decimal (currently set at 4). Depending on your Display Units, you may need to modify the Const XYSPACE to correctly reflect the total number digits in a coordinate (currently set at 12). Added reporting of the Cell Owner of an object via its Refdes and/or CellName. Enhanced column alignment of the Object Name. Added new object TestFixture Outline which updates the script to 7.9.4 objects level.

Version 8: Fixed bugs related to single point objects (Component and Text).

Version 9: Fixed reporting of Component GlueSpot's Owner.

Version 10: Added Capability to report and delete Groups based on a groups center location.

Version 11: Removed the reporting of Unplaced Components and their objects.

Hello, to All,

I have just finished a project and started generating reports. In *LAYOUT* When I tried to generate 'Parts List' the contents of the report are:

BOARD STATISTICS REPORT -- LabReference_PCB_Filter_Layout_071514.pcb -- Wed Jul 16 15:41:23 2014

Job Design Time:    20:39

Part Types:         26

Parts TopSide:      127   BottomSide:     0     Total: 127

Drilled pads:       296   Undrilled pads: 0     Total: 296

Via Name : STANDARDVIA   Via Count : 25

Signal Nets:        42

Connections Routed: 221  Partially 0    Unrouted: 0    Total: 221

=======================================================

...... and so on.

I.e., the contents of my 'Parts List' is actually a Statistics report. Not only that but the listed project pcb - LabReference_PCB_Filter_Layout_071514.pcb - is *incorrect*, as is the date - *July 16 2014*. I tried this several times with the same results. I then went to a second machine which is running a newer version of PADS and oddly enough a 'Parts List' report is not even an option, only 'Parts List 1' and 'Parts List 2'.

'Parts List 1' and 'Parts List 2' show up *correctly* in their respective formats.

I guess the first question would be, what information is contained in 'Parts List' which may not show up in 'Parts List 1' and 'Parts List 2' ?

Also, is there a VB script that generates 'Parts List', and if so, what is it named (aside from possibly the obvious) ?

Thanks.

In the Stackup Editor you can only create 1 substrate layer between 2 signal layers.

This is the stackup I want to create:

The substrate layer consist of 2 items, or sometimes it is build from more different materials.

If I create an extra substrate between the layers I get a warning: It is illegal to insert multiple substrates between metal layers.

How do I create more substrate layers between 2 signal layers?