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Hyperlynx IBIS model issue (DDR simulation)

June 3, 2015, 12:36 am
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Hi!

 

After I assign models and nets to simulate I receive the following error, while I try to perform the DDR3 batch simulation.

 

The following devices have inconsistent "Net to IBIS Model/Selector" mappings.

All signals of the same type should share the same IBIS Model/Selector.

Typically, this indicates that a signal net was not categorized correctly.

 

 

   Controller U10--

      Signal_Type  Pin#  IBIS_Signal  IBIS_Model/Selector  Net_Name

      DQS          M38   IP_DDR_0_DQSp BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_M38 CPU_DDR3_DQS0_P

      DQS          J38   IP_DDR_1_DQSp BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_J38 CPU_DDR3_DQS1_P

      DQS          F38   IP_DDR_2_DQSp BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_F38 CPU_DDR3_DQS2_P

      DQS          C38   IP_DDR_3_DQSp BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_C38 CPU_DDR3_DQS3_P

      DQS#         M37   IP_DDR_0_DQSn BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_M37 CPU_DDR3_DQS0_N

      DQS#         J37   IP_DDR_1_DQSn BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_J37 CPU_DDR3_DQS1_N

      DQS#         F37   IP_DDR_2_DQSn BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_F37 CPU_DDR3_DQS2_N

      DQS#         C37   IP_DDR_3_DQSn BCM28HPMFL3_T1XH_LPDDR3800M_CLK_DIFF_C37 CPU_DDR3_DQS3_N

      DQ           L36   IP_DDR_0_DQ0 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D0

      DQ           L38   IP_DDR_0_DQ1 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D1

      DQ           K33   IP_DDR_0_DQ2 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D2

      DQ           K31   IP_DDR_0_DQ3 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D3

      DQ           K34   IP_DDR_0_DQ4 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D4

      DQ           J34   IP_DDR_0_DQ5 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D5

      DQ           J31   IP_DDR_0_DQ6 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D6

      DQ           J32   IP_DDR_0_DQ7 GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D7

      DQ           G34   IP_DDR_1_DQ2 GRPIDQ1_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D10

      DQ           G33   IP_DDR_1_DQ3 GRPIDQ1_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D11

      DQ           H36   IP_DDR_1_DQ4 GRPIDQ1_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D12

      DQ           F31   IP_DDR_1_DQ5 GRPIDQ1_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D13

      DQ           G30   IP_DDR_1_DQ6 GRPIDQ1_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D14

      DQ           G31   IP_DDR_1_DQ7 GRPIDQ1_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D15

      DQ           F32   IP_DDR_2_DQ0 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D16

      DQ           E32   IP_DDR_2_DQ1 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D17

      DQ           F35   IP_DDR_2_DQ2 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D18

      DQ           E36   IP_DDR_2_DQ3 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D19

      DQ           E33   IP_DDR_2_DQ4 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D20

      DQ           E38   IP_DDR_2_DQ5 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D21

      DQ           D30   IP_DDR_2_DQ6 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D22

      DQ           D31   IP_DDR_2_DQ7 GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D23

      DQ           D34   IP_DDR_3_DQ0 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D24

      DQ           C35   IP_DDR_3_DQ1 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D25

      DQ           C34   IP_DDR_3_DQ2 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D26

      DQ           C32   IP_DDR_3_DQ3 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D27

      DQ           D33   IP_DDR_3_DQ4 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D28

      DQ           B35   IP_DDR_3_DQ5 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D29

      DQ           B38   IP_DDR_3_DQ6 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D30

      DQ           B33   IP_DDR_3_DQ7 GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_D31

      DM           J35   IP_DDR_0_DM  GRPIDQ0_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_DQM0

      DM           H33   IP_DDR_1_DM  GRPIDQ1_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_DQM1

      DM           F34   IP_DDR_2_DM  GRPIDQ2_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_DQM2

      DM           B36   IP_DDR_3_DM  GRPIDQ3_BCM28HPMFL3_T1XH_LPDDR3800M_SING CPU_DDR3_DQM3

 

What could be wrong here. Any help appreciated.

 

Regards,

M.

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Expedition 9.5 - Can only place a few vias in a conductive pad

December 5, 2015, 8:23 am
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Hi,  I'm trying to add as many vias into a thermal pad on an IC.  I can add about four but then when I try to add more I get an error message "Cannot resolve immovable metal conflicts".

 

I looked at a previous post in this forum about how to add vias into a conductive pad and followed the advice in that post,  here is that link:

 

 

 

https://communities.mentor.com/thread/16731

 

 

Ken

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xDX Designer marquee multiple problems

December 5, 2015, 9:07 pm
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xDX Designer, the firstmarqueeA,then hold down theCtrlkey, marqueeB, thenAandBNetoverlappingportionswill bedeselected.SeeFig. ThisproblemDXDesigner7.9toxDX Designer VX.1.1persist. This is abugit?

无标题.png2.png

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Trim problem in xPCB Layout VX.1.1

December 5, 2015, 10:36 pm
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As shown below,selectaLINEandArc,Trimtoolbarbutton is disabled. But ifthe leftstretchedLINEendpoint, theTrimbuttonisactivated. Theproblem is notevery time, in some casesthere will be, butI still have notfoundthe lawappears.
ProblemsPCBfilein the attachment

Thank you!

 

3.png

 

 

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ddr read batch simulation

December 6, 2015, 3:25 am
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Hai

             In ddr3 batch the write leveling option is present ,similarly how or where  read leveling settings are  fed to the simulation engine ?

Read leveling is implemented in the qoriq power pc as CAS to preamble calibration and dq to dqs calibration is there any option incorporated in the new release of hyperlynx 9.2

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DXF Export of Bottom Assembly Drawing has a Text Offset

November 26, 2015, 3:31 am
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I'm trying to export a DXF drawing of my assembly outlines and reference designators. For the top side this works fine. On the bottom side all reference designators have an offset. They are starting at the position where they should end.

 

At first it seems he is trying to mirror the text on a Edge.

 

But now I tryed all combinations of different text origins, text mirror checkbox & export mirror checkbox enableing and the result is allways the same.

 

There must be another option.

 

Is there an alternative to export am assembly drawing?

 

I'm using X-ENTP VX.1 Update 14


Regards, Michael

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NC symbol use

December 7, 2015, 12:09 am
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I defined nc symbol that looks like X and connected it tu unused pin at the design

when I run verify procidure -unconnected pins check i still get error on that pin

what i did wrong ?Capture1.JPG

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Can't use Cell- and Padstack Editor (faded tool/ tool not active/ can't click the tool)

December 7, 2015, 4:55 am
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Hello,

I have installed the version 7.9.5 of Expedition on Windows 7. In the part editor I can only create parts, but no padstacks or cells. I can use existing cells (in Pin Mapping) but not create them. I used a preinstalled library (HLA CentralLibrary) and made some additional parts. But now I can't create the needed padstacks/cells.

Please can someone help me? Write, if you need additional info.

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Drill holes missing in 3D view PADS Standard Plus VX1.2

December 7, 2015, 10:15 am
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hi all,

 

Is there a way to switch on/off the visibility of drill holes in 3D view, or is this a SW problem?

I did not find a way to see drill holes in 3D PCB view. In decal Editor 3D view drill holes are displayed correctly.

 

Best regards

Erwin

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How to adjust existing trace widths and clearances after a rule area boundary has been moved or edited.

December 7, 2015, 3:24 pm
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How I change the logical symbols and (&&) or (||)?

December 8, 2015, 5:55 am
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How I change the logical symbols and (&&) or (||)?

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Can't map 3d model - protected traces

December 8, 2015, 6:31 am
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It seems that it is not possible to map a 3d model to a component that has protected routes! I have designs done already for which would like to create 3d models of the board. And of course I have protected traces. Dear Mentor, is there another way than unprotecting the traces? Why 3d model association has to be treated like a local decal editing?

Thanks!

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How to reassign a 3d model?

December 8, 2015, 6:51 am
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Hi,

I assigned a 3d model to a component and saved to library. The help says

Restriction:

You cannot reassign a 3D model to a part if the part is already saved in the library with a 3D model.

So Mentor, please, I have a better model for may part how can I use it?

Thanks!

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Experiences with transition to VX?

November 12, 2015, 11:59 pm
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Hi all,

 

we are testing in the moment the actual VX release VX1.1.

And I would like ask you some questions about VX and the transition to VX:

- What are your experiences with VX? Is it faster, better or why should we switch to VX? Is it stable?

- How did you transfer your library? Do you maintain two libraries (one for 7.9.x and one for VX)?

- Do you make a hard cut: e.g. after 1st January all designs are on VX, or do you switch design by design over time?

- Do you have an fallback solution to go back to EE7.9.x, if there are bigger problems with VX?

- Are you waiting for VX2-release, cause it has some more nice features? Why?

 

So I am very interrested in any comments and experiences you have with VX.

 

Thanks and best regards,
Deborah

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Add 3D View with automation, and remove it

December 8, 2015, 11:46 am
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We are using Visual Basic 2010 Express. I want to add/remove a 3D PCB View using automation???

 

I can get the collection, and the views within it.

 

Here is part of the code:

 

        Dim oPCBView As MGCPCB.Views

        oPCBViews = oPCBDoc.ViewsEx

        Console.Write(vbCrLf & vbCrLf & oPCBViews.Count & vbCrLf)

        For x As Integer = 1 To oPCBViews.Count

            oPCBView = oPCBViews.Item(x)

            oPCBView.Activate()

            Console.Write(vbCrLf & oPCBView.Name)

            Console.Write(vbCrLf & oPCBView.Type)

            Console.Write(vbCrLf & oPCBView.OriginalName)

            If oPCBView.Name.Contains("3D View") Then

                oPCBView.Delete()

            End If

        Next

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Import PartQuest Parts (from dropbox folder) stops working

December 7, 2015, 9:43 pm
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I've been using PartQuest successfully for several months.  After a multi-week hiatus from PCB design, I'm working on a new board and went through my typical pattern of selecting a part in PartQuest, setting it to download (into my dropbox, which has been successfully integrated since when I started using PartQuest). 

 

So far, so good, however: On selecting Tools -> "Import PartQuest Parts" in xDX Designer, I get the message "There is no product license available on your machine. The PartQuest files will not be decrypted." 

 

The same thing happens if I trigger the import from PADS Layout.

 

I checked and our PADS licenses are good through 8/2016.

 

I downloaded and installed the latest PartQuest Integration Utilities, rebooted, same problem.

 

I deleted the PartQuest folder from the Apps directory of the dropbox and then re-linked the dropbox from my PartQuest profile, triggering the PartQuest folder and all its content to be re-generated.  Still no dice.

 

I switched to the direct download approach and grabbed the part as a .pqz file, extracted it, then ran the import PartQuest parts menu item to import it, same error, (then I edited the PartQuest.ini file to actually point to the directory with the extracted file and THAT ran properly).  At this point, I would like to go back to the dropbox method rather than manually downloading part by part, but every time I try, it generates the same error.  To check if it had something to do with the files extracted from .pqz files vs files downloaded directly into dropbox, I manually copied a file [that had been pushed by PartQuest to the dropbox directory] into the download folder I'd been extracting .pqz files into, and the import command ran fine importing the file, so it appears the error follows the directory location, not the file delivery method.

 

Has dropbox functionality been intentionally removed?

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Generate fsdb database from Questa-adms

December 8, 2015, 3:59 pm
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Hi,

I'm trying to generate a fsdb output from questa-adms for a mixed signal simulation. Checking the documentation, .option FSDB should do it. After trying the latter option, the fsdb file is generated but is missing the digital signals and only analog signals are included. Both the digital and analog signals show up in the .wdb file.

 

I also tried the ffcv (eldo) utility to convert the wdb database to fsdb. I get some warnings and checking the fsdb waveforms, the digital signals show up but the analog signals are incomplete/wrong.

This is the warning I observe:

*NOVAS WARN* *FATAL ERROR* Rewinding time is prohibited. Time creation should be skipped.

 

Thanks for your help.

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"Allow Cell Overhang" not available for Mechanical Cells?

November 13, 2015, 6:26 am
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I've recently added a "light pipe" mechanical cell to our library. I would have preferred to create it as a package cell, so it could be placed in schematic, and annotated to the PCB, but alas, the age-old problem of "if it doesn't have a pin, it's not a part". Since this part only requires NPT holes, I can't make it a package cell, so I created it as a Mechanical cell. Now, when I place it the design, it will not allow me to overhang the board edge, and unless they've hidden it in some obscure place, Mechanical cells do not seem to have the "allow cell overhang" check box available. So what's a person supposed to do when they have a mechanical part that is supposed to overhang the board edge by design, but the tool doesn't seem to support that?

 

Thanks,

Tom D.

Cobham AvComm

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X-ENTP VX.1.2正式发布！可在SupportNet下载.

December 8, 2015, 11:16 pm
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How do i make hetro symbols for a TLC2272 that refdes correctly

March 16, 2015, 10:07 am
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Hi All,

I created two symbols for the TLC2272 separating the power and ground as a separate symbol but when I refdes the two symbols the power symbol gets a different refdes number. My guess is I have the PDB set up wrong. I heard the fix is to manually rename the refdes. This makes no sense to me. If I add the symbol to different pages the same thing happens.

Any suggestions would be helpful.

Kirby

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